发明申请
US20130252377A1 Process For Fabricating Multi-Die Semiconductor Package With One Or More Embedded Die Pads 有权
用于制造具有一个或多个嵌入式模块的多芯片半导体封装的工艺

Process For Fabricating Multi-Die Semiconductor Package With One Or More Embedded Die Pads
摘要:
To avoid shorts between adjacent die pads in mounting, a multi-die semiconductor package to a printed circuit board (PCB), one of the die pads is embedded in the polymer capsule, while the other die pad is exposed at the bottom of the package to provide a thermal escape path to the PCB. This arrangement is particularly useful when one of the dice in a multi-die package generates more heat than another die in the package. A process for fabricating the package includes a partial etch that defines the bottom surface of the embedded die pad and may include a through-etch that leaves one or more of the contacts or leads integrally connected to the embedded die pad.
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