发明申请
US20130270715A1 PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES 有权
包装半导体套件,用于无阻堆叠接口(BBUL)包装

PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES
摘要:
A packaged semiconductor die with a bumpless die-package interface and methods of fabrication are described. For example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines, one of which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate. In another example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines with a layer of conductive vias disposed thereon. At least one of the conductive lines is coupled directly to a conductive via of the semiconductor die which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate.
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