发明申请
- 专利标题: PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES
- 专利标题(中): 包装半导体套件,用于无阻堆叠接口(BBUL)包装
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申请号: US13996495申请日: 2011-12-15
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公开(公告)号: US20130270715A1公开(公告)日: 2013-10-17
- 发明人: Pramod Malatkar , Weng Hong Teh , John S. Guzek , Robert L. Sankman
- 申请人: Pramod Malatkar , Weng Hong Teh , John S. Guzek , Robert L. Sankman
- 国际申请: PCT/US2011/065269 WO 20111215
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
A packaged semiconductor die with a bumpless die-package interface and methods of fabrication are described. For example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines, one of which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate. In another example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines with a layer of conductive vias disposed thereon. At least one of the conductive lines is coupled directly to a conductive via of the semiconductor die which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate.
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