Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE
- Patent Title (中): 半导体封装
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Application No.: US13896616Application Date: 2013-05-17
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Publication No.: US20130313698A1Publication Date: 2013-11-28
- Inventor: Tai-Yu CHEN , Chung-Fa LEE , Wen-Sung HSU , Shih-Chin LIN
- Applicant: MediaTek Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: MediaTek Inc.
- Current Assignee: MediaTek Inc.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H01L23/36
- IPC: H01L23/36

Abstract:
A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board, having a first cross sectional dimension; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; an encapsulant layer, formed over the circuit board, covering the semiconductor chip and surrounding the spacer; a heat spreading layer, formed over the encapsulant layer and the spacer; and a plurality of solder balls, formed over the second surface of the circuit board.
Public/Granted literature
- US09000581B2 Semiconductor package Public/Granted day:2015-04-07
Information query
IPC分类: