公开(公告)号：US20240170360A1

公开(公告)日：2024-05-23

申请号：US18422166

申请日：2024-01-25

Applicant: MEDIATEK Inc.

Inventor： Chun-Yin LIN ,  Yu-Jin LI ,  Tai-Yu CHEN ,  Pu-Shan HUANG

IPC: H01L23/367 ,  H01L23/00

CPC classification number: H01L23/3675 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/05644 ,  H01L2224/16225 ,  H01L2224/29012 ,  H01L2224/29035 ,  H01L2224/32225 ,  H01L2224/32257 ,  H01L2224/33055 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83104

Abstract: A semiconductor device includes a substrate, an electronic component, a cover and a liquid metal. The electronic component is disposed on the substrate. The cover is disposed on the substrate, coves the electronic component and has a recess. The liquid metal is formed between the recess and the electronic component.

公开(公告)号：US20140319668A1

公开(公告)日：2014-10-30

申请号：US14326695

申请日：2014-07-09

Applicant: MediaTek Inc.

Inventor： Tai-Yu CHEN ,  Chun-Wei CHANG ,  Chung-Hwa WU

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/522 ,  H01L23/00

CPC classification number: H01L23/3675 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/49816 ,  H01L23/5226 ,  H01L24/14 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A package on package (PoP) structure is disclosed. The PoP structure comprises a top package and a bottom package disposed thereunder. The top package comprises a first substrate and a first die mounted onto the first substrate. At least one electrically floating pad is disposed on a lower surface of the first substrate. The bottom package comprises a second substrate and a second die mounted onto the second substrate. An upper surface of the second die is in thermal contact with the electrically floating pad.

Abstract translation: 公开了一种封装（PoP）封装。 PoP结构包括顶部封装和底部封装。 顶部封装包括第一基板和安装在第一基板上的第一管芯。 至少一个电浮置焊盘设置在第一基板的下表面上。 底部包装包括第二基板和安装在第二基板上的第二管芯。 第二管芯的上表面与电浮置焊盘热接触。

公开(公告)号：US20230260866A1

公开(公告)日：2023-08-17

申请号：US18157159

申请日：2023-01-20

Applicant: MEDIATEK INC.

Inventor： Yin-Fa CHEN ,  Bo-Jiun YANG ,  Ta-Jen YU ,  Bo-Hao MA ,  Chih-Wei CHANG ,  Tsung-Yu PAN ,  Tai-Yu CHEN ,  Shih-Chin LIN ,  Wen-Sung HSU

IPC: H01L23/367 ,  H01L23/00 ,  H01L23/498 ,  H01L23/13

CPC classification number: H01L23/3675 ,  H01L24/73 ,  H01L24/16 ,  H01L24/32 ,  H01L24/17 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/13 ,  H01L2924/1511 ,  H01L2924/15151 ,  H01L2924/152 ,  H01L2924/15331 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/32059 ,  H01L2224/32225 ,  H01L2224/17051 ,  H01L2924/1011

Abstract: A semiconductor package structure includes a package substrate, a semiconductor die, an interposer, an adhesive layer, and a molding material. The semiconductor die is disposed over the package substrate. The interposer is disposed over the semiconductor die. The adhesive layer connects the semiconductor die and the interposer. The molding material surrounds the semiconductor die and the adhesive layer.

公开(公告)号：US20130313698A1

公开(公告)日：2013-11-28

申请号：US13896616

申请日：2013-05-17

Applicant: MediaTek Inc.

Inventor： Tai-Yu CHEN ,  Chung-Fa LEE ,  Wen-Sung HSU ,  Shih-Chin LIN

IPC: H01L23/36

CPC classification number: H01L23/3736 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/33 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board, having a first cross sectional dimension; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; an encapsulant layer, formed over the circuit board, covering the semiconductor chip and surrounding the spacer; a heat spreading layer, formed over the encapsulant layer and the spacer; and a plurality of solder balls, formed over the second surface of the circuit board.

Abstract translation: 提供一种具有降低翘曲问题的半导体封装，包括：具有相对的第一和第二表面的电路板; 半导体芯片，形成在电路板的第一表面的中心部分上，具有第一横截面尺寸; 形成在所述半导体芯片的中心部分上的间隔物，具有小于所述第一横截面尺寸的第二截面尺寸; 形成在电路板上的密封剂层，覆盖半导体芯片并围绕间隔物; 形成在密封剂层和间隔物上的散热层; 以及形成在电路板的第二表面上的多个焊球。

公开(公告)号：US20160153922A1

公开(公告)日：2016-06-02

申请号：US14951698

申请日：2015-11-25

Applicant: MediaTek Inc.

Inventor： Yu-Min LEE ,  Chi-Wen PAN ,  Hung-Wen CHIOU ,  Tai-Yu CHEN ,  Tao CHENG ,  Wen-Sung HSU ,  Sheng-Liang LI

IPC: G01N25/18

CPC classification number: G01N25/18 ,  G01N2033/0078 ,  G01N2033/0095 ,  G06F17/5009 ,  G06F2217/16

Abstract: A computer system and a method for adaptive thermal resistance-capacitance (RC) network analysis of a semiconductor device for use in a portable device are provided. The method includes the steps of: receiving a device input file and a plurality of specific effective heat transfer coefficients (HTCs) associated with the portable device; repeatedly performing a thermal analysis of the portable device based on the device input file and a current effective HTC to estimate a target die temperature of the semiconductor device; calculating a target effective HTC based on the device input file and the target die temperature; and updating the current effective HTC with the target effective HTC; and generating an output file recording the target die temperature of the semiconductor device.

Abstract translation: 提供了一种用于便携式设备的半导体器件的计算机系统和用于自适应热电阻 - 电容（RC）网络分析的方法。 该方法包括以下步骤：接收与便携式设备相关联的设备输入文件和多个特定有效传热系数（HTC）; 基于设备输入文件和当前有效HTC重复执行便携式设备的热分析以估计半导体器件的目标管芯温度; 基于设备输入文件和目标模具温度计算目标有效HTC; 并用目标有效HTC更新当前有效的HTC; 以及生成记录半导体器件的目标管芯温度的输出文件。

公开(公告)号：US20230282626A1

公开(公告)日：2023-09-07

申请号：US18163417

申请日：2023-02-02

Applicant: MEDIATEK INC.

Inventor： Tai-Yu CHEN ,  Bo-Jiun YANG ,  Tsung-Yu PAN ,  Yin-Fa CHEN ,  Ta-Jen YU ,  Bo-Hao MA ,  Wen-Sung HSU ,  Yao-Pang HSU

IPC: H01L25/10 ,  H01L23/498 ,  H01L23/00 ,  H01L23/14

CPC classification number: H01L25/105 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/16 ,  H01L23/147 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/182 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1511 ,  H01L2924/152

Abstract: A high-bandwidth package-on-package (HBPoP) structure includes a first package structure and a second package structure disposed over the first package structure. The first package structure includes a first package substrate, a semiconductor die, an interposer, and a molding material. The first package substrate is formed of a silicon and/or ceramic material. The semiconductor die is disposed over the first package substrate. The interposer is disposed over the semiconductor die and is formed of a silicon and/or ceramic material. The molding material is disposed between the first package substrate and the interposer and surrounds the semiconductor die.

公开(公告)号：US20220223512A1

公开(公告)日：2022-07-14

申请号：US17546191

申请日：2021-12-09

Applicant: MEDIATEK INC.

Inventor： Che-Hung KUO ,  Hsing-Chih LIU ,  Tai-Yu CHEN

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/48 ,  H01L23/64

Abstract: A semiconductor package structure includes a frontside redistribution layer, a first semiconductor die, a first capacitor, a conductive terminal, and a backside redistribution layer. The first semiconductor die is disposed over the frontside redistribution layer. The first capacitor is disposed over the frontside redistribution layer and electrically coupled to the first semiconductor die. The conductive terminal is disposed below the frontside redistribution layer and electrically coupled to the frontside redistribution layer. The backside redistribution layer is disposed over the first semiconductor die.

公开(公告)号：US20160343929A1

公开(公告)日：2016-11-24

申请号：US14717159

申请日：2015-05-20

Applicant: MediaTek Inc.

Inventor： Long-Kun YU ,  Chin-Chiang CHANG ,  Chia-Wei CHI ,  Chia-Feng YEH ,  Tai-Yu CHEN

IPC: H01L35/32 ,  H01L21/66 ,  H01L25/04 ,  H01L23/12 ,  H01L23/20 ,  H01L23/00 ,  H02J7/00 ,  H01L23/04

CPC classification number: H01L35/32 ,  H01L22/34 ,  H01L23/04 ,  H01L23/12 ,  H01L23/20 ,  H01L23/38 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/17 ,  H01L25/04 ,  H01L35/28 ,  H01L2224/08145 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17107 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/18161 ,  H02J7/0052 ,  H01L2924/00012 ,  H01L2924/00

Abstract: The invention provides a portable electronic system. The portable electronic system includes a semiconductor package. The semiconductor package includes a substrate. A semiconductor die is coupled to the substrate. A thermoelectric device chip is disposed close to the semiconductor die, coupled to the substrate. The thermoelectric device chip is configured to detect a heat energy generated from the semiconductor die and to convert the heat energy into a recycled electrical energy. A power system is coupled to the semiconductor package, configured to store the recycled electrical energy.

Abstract translation: 本发明提供一种便携式电子系统。 便携式电子系统包括半导体封装。 半导体封装包括衬底。 半导体管芯耦合到衬底。 热电器件芯片靠近半导体管芯设置，耦合到衬底。 热电元件芯片被配置为检测从半导体管芯产生的热能并将热能转换成再循环的电能。 电力系统耦合到半导体封装，被配置为存储再循环的电能。

公开(公告)号：US20240274517A1

公开(公告)日：2024-08-15

申请号：US18418419

申请日：2024-01-22

Applicant: MEDIATEK INC.

Inventor： Fa-Chuan CHEN ,  Ta-Jen YU ,  Bo-Jiun YANG ,  Tsung-Yu PAN ,  Tai-Yu CHEN ,  Nai-Wei LIU ,  Shih-Chin LIN ,  Wen-Sung HSU

IPC: H01L23/498 ,  H01L21/28 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/49816 ,  H01L21/28132 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0652 ,  H01L2224/05025 ,  H01L2224/05147 ,  H01L2224/13025 ,  H01L2224/13147 ,  H01L2924/01029 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/351

Abstract: A semiconductor package structure includes a first component, a bonding structure on the first component, a second component connected to the first component, and a copper connector on the second component. The bonding structure includes a copper base on the first component and copper protruding portions on the copper base. The second component is connected to the first component by bonding the copper protruding portions to the copper connector, and the copper protruding portions are in contact with the copper connector.

公开(公告)号：US20230197667A1

公开(公告)日：2023-06-22

申请号：US18172409

申请日：2023-02-22

Applicant: MEDIATEK Inc.

Inventor： Yu-Jin LI ,  Bo-Jiun YANG ,  Tai-Yu CHEN ,  Tsung-Yu PAN ,  Chun-Yin LIN

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L24/32 ,  H01L23/3107 ,  H01L23/373 ,  H01L24/16 ,  H01L21/4871 ,  H01L21/56 ,  H01L23/49816

Abstract: A semiconductor device includes a substrate, an electronic component, a cover, a heat conduction component and a dam. The electronic component is disposed on the substrate. The cover is disposed on the substrate and covers the electronic component. The heat conduction component is disposed between the electronic component and the cover. The dam is disposed between the electronic component and the cover and surrounds the heat conduction component.