发明申请
US20130329057A1 Systems and Methods for Dynamic Dwelling Time for Tuning Display to Reduce or Eliminate Mura Artifact 有权
动态停留时间的系统和方法用于调整显示以减少或消除Mura人工制品

Systems and Methods for Dynamic Dwelling Time for Tuning Display to Reduce or Eliminate Mura Artifact
摘要:
Systems and methods for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve turning on an electronic display and programming pixels the electronic display to a uniform gray level. An initial luminance value may be determined and, after waiting a period of time, a subsequent luminance of the pixels may be measured. When a difference between the subsequent luminance and initial luminance is within a threshold, the mura artifact may be understood to have settled and the electronic display may be calibrated.
信息查询
0/0