发明申请
- 专利标题： VARIABLE GATE WIDTH FOR GATE ALL-AROUND TRANSISTORS
- 专利标题（中）： 用于门控全能绕组的可变门宽度
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申请号： US13997162申请日： 2011-12-30
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公开(公告)号： US20130341704A1公开(公告)日： 2013-12-26
- 发明人: Willy Rachmady , Van H. Le , Ravi Pillarisetty , Jack T. Kavalieros , Robert S. Chau , Seung Hoon Sung
- 申请人： Willy Rachmady , Van H. Le , Ravi Pillarisetty , Jack T. Kavalieros , Robert S. Chau , Seung Hoon Sung
- 国际申请： PCT/US2011/068239 WO 20111230
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L29/66
摘要：
Nanowire-based gate all-around transistor devices having one or more active nanowires and one or more inactive nanowires are described herein. Methods to fabricate such devices are also described. One or more embodiments of the present invention are directed at approaches for varying the gate width of a transistor structure comprising a nanowire stack having a distinct number of nanowires. The approaches include rendering a certain number of nanowires inactive (i.e. so that current does not flow through the nanowire), by severing the channel region, burying the source and drain regions, or both. Overall, the gate width of nanowire-based structures having a plurality of nanowires may be varied by rendering a certain number of nanowires inactive, while maintaining other nanowires as active.
公开/授权文献
- US09590089B2 Variable gate width for gate all-around transistors 公开/授权日：2017-03-07
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