发明申请
- 专利标题: DECISION FEEDBACK EQUALIZER
- 专利标题(中): 决策反馈均衡器
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申请号: US13528877申请日: 2012-06-21
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公开(公告)号: US20130346811A1公开(公告)日: 2013-12-26
- 发明人: Ming-Chieh HUANG , Chan-Hong CHERN , Tao Wen CHUNG , Yuwen SWEI , Chih-Chang LIN , Tsung-Ching HUANG
- 申请人: Ming-Chieh HUANG , Chan-Hong CHERN , Tao Wen CHUNG , Yuwen SWEI , Chih-Chang LIN , Tsung-Ching HUANG
- 申请人地址: TW Hsin-Chu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: G06F1/04
- IPC分类号: G06F1/04 ; G06F11/00
摘要:
A circuit includes a summation circuit for receiving an input data signal and a feedback signal including a previous data bit. The summation circuit is configured to output a conditioned input data signal to a clock and data recovery circuit. A first flip-flop is coupled to an output of the summation circuit and is configured to receive a first set of bits of the conditioned input data signal and a first clock signal having a frequency that is less than a frequency at which the input data signal is received by the first summation circuit. A second flip-flop is coupled to the output of the summation circuit and is configured to receive a second set of bits of the conditioned input data signal and a second clock signal having a frequency that is less than the frequency at which the input data signal is received by the first summation circuit.
公开/授权文献
- US08862951B2 Decision feedback equalizer 公开/授权日:2014-10-14