Invention Application
US20140001561A1 CMOS DEVICES HAVING STRAIN SOURCE/DRAIN REGIONS AND LOW CONTACT RESISTANCE 审中-公开
具有应变源/漏区的CMOS器件和低接触电阻

CMOS DEVICES HAVING STRAIN SOURCE/DRAIN REGIONS AND LOW CONTACT RESISTANCE
Abstract:
A CMOS device structure and method of manufacturing the same are provided. The CMOS device structure includes a substrate having a first region and a second region. The CMOS device structure further includes a first gate formed in the first region overlying a first channel region in the substrate. The CMOS device structure further includes a first pair of source/drain regions formed in the first region on either side of the first channel region. Each region of the pair of source/drain regions has a substantially V-shaped concave top surface.
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