发明申请
- 专利标题： LOW POWER AND HIGH PERFORMANCE PHYSICAL REGISTER FREE LIST IMPLEMENTATION FOR MICROPROCESSORS
- 专利标题（中）： 低功耗和高性能物理寄存器免费列表实现微处理器
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申请号： US13541351申请日： 2012-07-03
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公开(公告)号： US20140013085A1公开(公告)日： 2014-01-09
- 发明人: Suparn Vats , John H. Mylius , Abhijit Radhakrishnan
- 申请人： Suparn Vats , John H. Mylius , Abhijit Radhakrishnan
- 主分类号： G06F9/30
- IPC分类号： G06F9/30
摘要：
A system and method for reducing latency and power of register renaming. A free list in processor includes multiple banks for indicating availability of register identifiers used for register renaming. A register rename unit receives one or more destination architectural registers to rename with physical register identifiers. Responsive to determining the multiple banks within the free list are unbalanced with available physical register identifiers, one or more returning physical register identifiers are assigned to the destination architectural registers before assigning any physical register identifiers from any bank of the multiple banks with a lowest number of available physical register identifiers. A returning physical register identifier is a physical register identifier that is available again for assignment to a destination architectural register but not yet indicated in the free list as available. Each of the banks includes a single bit width decoded vector for indicating availability of given physical register identifiers.
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