发明申请
US20140025908A1 FAST MECHANISM FOR ACCESSING 2n±1 INTERLEAVED MEMORY SYSTEM
有权
用于访问2n±1个交互式存储器系统的快速机制
- 专利标题: FAST MECHANISM FOR ACCESSING 2n±1 INTERLEAVED MEMORY SYSTEM
- 专利标题(中): 用于访问2n±1个交互式存储器系统的快速机制
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申请号: US13993680申请日: 2012-06-11
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公开(公告)号: US20140025908A1公开(公告)日: 2014-01-23
- 发明人: Saurabh Sharma , Altug Koker , Aditya Navale
- 申请人: Saurabh Sharma , Altug Koker , Aditya Navale
- 国际申请: PCT/US12/41855 WO 20120611
- 主分类号: G06F12/06
- IPC分类号: G06F12/06
摘要:
A mechanism implemented by a controller enables efficient access to an interleaved memory system that includes M modules, M being (2n+1) or (2n−1), n being a positive integer number. Upon receiving an address N, the controller performs shift and add/subtract operations to obtain a quotient of N divided by M based on a binomial series expansion of N over M. The controller computes a remainder of N divided by M based on the quotient. The controller then accesses one of the modules in the memory based on the remainder.
公开/授权文献
- US09268691B2 Fast mechanism for accessing 2n±1 interleaved memory system 公开/授权日:2016-02-23
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