Invention Application
- Patent Title: THREE-DIMENSIONAL (3D) SEMICONDUCTOR PACKAGE
- Patent Title (中): 三维(3D)半导体封装
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Application No.: US13673910Application Date: 2012-11-09
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Publication No.: US20140042604A1Publication Date: 2014-02-13
- Inventor: Hyung Jin Jeon , Jong Yun Lee , Kyoung Moo Harr
- Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- Applicant Address: KR Gyunggi-do
- Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- Current Assignee Address: KR Gyunggi-do
- Priority: KR10-2012-0087743 20120810
- Main IPC: H01L23/498
- IPC: H01L23/498

Abstract:
Disclosed herein is a three-dimensional (3D) semiconductor package. The 3D semiconductor package includes a printed circuit board, a main interposer that is formed on the printed circuit board, a semiconductor device that is formed on the main interposer, and a support interposer that is disposed on the same plane as a plane of the semiconductor device, or disposed between the main interposer and the semiconductor device. Here, each of the main interposer, the semiconductor device, and the support interposer may include a through-via formed based on a thickness direction of the printed circuit board.
Information query
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