A comparator circuit includes an input differential amplifier circuit generating an output signal and an inverting output circuit generating a complemented output signal. The differential amplifier circuit is formed of a differential pair of input transistors and a pair of diode connected load transistors. The comparator circuit is integrated in a silicon on insulator type structure. A hysteresis-creating circuit is formed by coupling one or more of the output signal and complemented output signal to a substrate region (in the silicon on insulator type structure) associated with one or more of the differential pair of input transistors and pair of diode connected load transistors. The differential amplifier circuit may further include auxiliary transistors coupled to the diode connected load transistors and the hysteresis-creating circuit may further couple one or more of the output signal and complemented output signal to the substrate region associated with the auxiliary transistor.