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    Comparator circuit and semiconductor device
    2.
    发明授权
    Comparator circuit and semiconductor device 有权

    公开(公告)号：US11784636B2

    公开(公告)日：2023-10-10

    申请号：US17535336

    申请日：2021-11-24

    申请人： FUJI ELECTRIC CO., LTD.

    发明人： Masashi Akahane

    IPC分类号： H03K3/3565 ,  H03K5/24 ,  H03K17/687 ,  G01R19/165

    CPC分类号： H03K3/3565 ,  G01R19/16538 ,  H03K5/2481 ,  H03K17/687

    摘要： A comparator circuit configured to output an output voltage at a first logic level, upon an input voltage exceeding a first threshold voltage, and output the output voltage at a second logic level, upon the input voltage dropping below a second threshold voltage lower than the first threshold voltage. The comparator circuit includes a converter circuit configured to convert the input voltage of the comparator circuit into a first voltage and a second voltage lower than the first voltage, and a logic circuit configured to output a voltage, as the output voltage of the comparator circuit, that is at the first logic level, upon the first voltage exceeding a third threshold voltage, and at the second logic level, upon the second voltage dropping below a fourth threshold voltage lower than the third threshold voltage.

    Semiconductor apparatus
    4.
    发明授权
    Semiconductor apparatus 有权

    公开(公告)号：US11258442B2

    公开(公告)日：2022-02-22

    申请号：US17138634

    申请日：2020-12-30

    申请人： SK hynix Inc.

    发明人： Seung Ho Lee

    IPC分类号： H03K3/02 ,  H03L7/00 ,  H03K3/3565 ,  H03K5/24 ,  H03K19/20 ,  H03K17/22 ,  G01R19/165 ,  H03K5/00

    摘要： A semiconductor apparatus includes a control circuit and a level shifter. The control circuit is configured to output a power control signal for activating a data input/output circuit operated by a first voltage when the first voltage is higher than a first set voltage and a second voltage is higher a second set voltage. The level shifter configured to receive the power control signal and lower operating voltages of devices including a plurality of transistors with a thin gate insulating layer based on the power control signal.

    Electrostatic discharge protection circuit having variable schmitt trigger characteristics
    5.
    发明授权
    Electrostatic discharge protection circuit having variable schmitt trigger characteristics 有权

    公开(公告)号：US11095121B2

    公开(公告)日：2021-08-17

    申请号：US16432962

    申请日：2019-06-06

    申请人： Samsung Electronics Co., Ltd.

    发明人： Ju-Ho Jeon ,  Jin-Hee Park ,  Hyuck-Joon Kwon

    IPC分类号： H02H9/04 ,  H03K3/3565 ,  H02H1/00

    摘要： An electrostatic protection circuit with variable Schmitt trigger characteristics is provided. The electrostatic protection circuit uses a Schmitt trigger circuit to protect an integrated circuit against an overvoltage. The Schmitt trigger circuit includes first and second branches bridged between a power supply rail and a ground rail. The Schmitt trigger circuit operates with a narrow hysteresis width when the second branch is connected in parallel to the first branch and with a wide hysteresis width when the second branch is not connected in parallel to the first branch. The electrostatic protection circuit discharges an overvoltage of the power supply rail using a narrow hysteresis width when a weak overvoltage is applied to the power supply rail, and discharges an overvoltage of the power supply rail using a wide hysteresis width when a strong overvoltage is applied to the power supply rail.

    Comparator circuit with hysteresis function and a semiconductor device thereof
    6.
    发明授权
    Comparator circuit with hysteresis function and a semiconductor device thereof 有权

    公开(公告)号：US10763840B1

    公开(公告)日：2020-09-01

    申请号：US16660883

    申请日：2019-10-23

    申请人： Lite-On Singapore Pte. Ltd.

    发明人： Meng-Tong Tan ,  You-Fa Wang

    IPC分类号： H03K3/00 ,  H03K5/24 ,  H03K3/3565

    摘要： A comparator circuit includes a first comparator, a second comparator and an inverter. The first comparator includes two N-channel metal-oxide-semiconductor (NMOS) transistors, two first P-channel metal-oxide-semiconductor (PMOS) transistors and two second PMOS transistors. A gate of the NMOS transistors respectively receives first and second voltages, and sources of the first PMOS transistors are connected to first and second resistors, respectively. The first comparator outputs differential output signals from drains of the NMOS transistors according to the voltage difference between the first and second voltages. An output of the second comparator is connected to gates of the first PMOS transistors of the first comparator. An input of the inverter is connected to the output of the second comparator, and an output of the inverter is connected to gates of the PMOS transistors.

    Method for Biasing Outputs of a Folded Cascode Stage in a Comparator and Corresponding Comparator
    8.
    发明申请
    Method for Biasing Outputs of a Folded Cascode Stage in a Comparator and Corresponding Comparator 审中-公开

    公开(公告)号：US20200014376A1

    公开(公告)日：2020-01-09

    申请号：US16449700

    申请日：2019-06-24

    申请人： STMicroelectronics (Rousset) SAS

    发明人： Yohan Joly ,  Vincent Binet

    IPC分类号： H03K5/24 ,  H03F3/45 ,  H03K3/3565

    摘要： A comparator includes a folded cascode stage having positive and negative outputs. The folded cascode stage includes: a common-mode voltage regulation circuit that includes resistive elements that are respectively situated between each of the outputs and a common-mode node. A compensation circuit is configured to regulate a difference between the voltages on the outputs, and is configured to generate a constant and continuous compensation current in the two resistive elements. A hysteresis circuit is configured to offset voltages on the outputs, and to generate a hysteresis current in the two resistive elements.

    SCHMITT TRIGGER CIRCUIT
    9.
    发明申请
    SCHMITT TRIGGER CIRCUIT 审中-公开

    公开(公告)号：US20190305762A1

    公开(公告)日：2019-10-03

    申请号：US16443712

    申请日：2019-06-17

    申请人： KABUSHIKI KAISHA TOSHIBA ,  TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION

    发明人： Takayuki HIRAOKA

    IPC分类号： H03K3/3565 ,  H03K3/356 ,  H03K17/30

    摘要： A Schmitt trigger circuit includes a first circuit; a second circuit; a first switch; a third circuit; and a second switch. The first circuit output the output signal of a second or first logical level. The second circuit is coupled to a first potential node at a first end, and sends a current between the first end and a second end based on the output signal. The first switch electrically couples or uncouples the second end and a first node based on a selection signal. The third circuit is coupled to a second potential node at a third end, and sends a current exclusively with the second circuit between the third end and a fourth end based on the output signal. The second switch electrically couples or uncouples the fourth end and the first node based on the selection signal.

    Hysteresis comparator
    10.
    发明授权
    Hysteresis comparator 有权

    公开(公告)号：US10432178B2

    公开(公告)日：2019-10-01

    申请号：US16122574

    申请日：2018-09-05

    申请人： NXP B.V.

    发明人： Jaume Tornila Oliver

    IPC分类号： H03K3/00 ,  H03K3/3565 ,  H03K3/037 ,  H03K5/24 ,  G05F3/26 ,  H03K3/011 ,  H03K3/013 ,  H03K3/0233

    摘要： The present application relates to a hysteresis comparator, which comprises a hysteresis comparator circuit and a hysteresis generating circuit. The hysteresis comparator circuit two comparator legs each with a differential transistor and a load transistor. The differential transistors receive a comparator biasing current, which is variably divided based on the relative levels of the voltage signals applied to control terminals of the differential transistors. An output stage is provided for developing an output voltage signal based on currents flowing through the load transistors. The hysteresis generating circuit is arranged for selectively injecting a hysteresis current in or selectively drawing a hysteresis current from either one of the two comparator legs depending on the level of the output voltage signal.