发明申请
US20140117554A1 PACKAGED INTEGRATED CIRCUIT HAVING LARGE SOLDER PADS AND METHOD FOR FORMING
有权
具有大型焊盘的包装集成电路及其形成方法
- 专利标题： PACKAGED INTEGRATED CIRCUIT HAVING LARGE SOLDER PADS AND METHOD FOR FORMING
- 专利标题（中）： 具有大型焊盘的包装集成电路及其形成方法
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申请号： US13660243申请日： 2012-10-25
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公开(公告)号： US20140117554A1公开(公告)日： 2014-05-01
- 发明人: Trent S. Uehling , Brett P. Wilkerson
- 申请人： Trent S. Uehling , Brett P. Wilkerson
- 主分类号： H01L23/485
- IPC分类号： H01L23/485 ; H01L21/60
摘要：
A package substrate has a die mounted on a first side. One or more inner solder pads are on an inner portion of a second side. A perimeter of the inner portion is aligned with a perimeter of the die. The one or more inner solder pads are the only solder pads on the inner portion. The one or more inner solder pads number no more than five. A plurality of outer solder pads are on an outer portion of the second side. An average of areas of the one or more inner solder pads is at least five times an average of areas of the one or more inner solder pads. The plurality of outer solder ball pads are for receiving solder ball balls. The outer portion is spaced from the perimeter of the inner portion. The outer portion and the inner portion are coplanar.
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