Invention Application
US20140162420A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICES HAVING VERTICAL CELLS
有权
制造具有垂直细胞的半导体器件的方法
- Patent Title: METHOD OF FABRICATING SEMICONDUCTOR DEVICES HAVING VERTICAL CELLS
- Patent Title (中): 制造具有垂直细胞的半导体器件的方法
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Application No.: US14018578Application Date: 2013-09-05
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Publication No.: US20140162420A1Publication Date: 2014-06-12
- Inventor: Jung-Ik OH , Dae-Hyun JANG , Kyoung-Sub SHIN
- Applicant: Jung-Ik OH , Dae-Hyun JANG , Kyoung-Sub SHIN
- Priority: KR10-2012-0141980 20121207
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
According to example embodiments, a method of fabricating a semiconductor device includes: forming a preliminary stack structure including upper and lower preliminary stack structures by alternately stacking a plurality of interlayer insulating and sacrificial layers on a cell, first pad area, sacrificial area and second pad area of a substrate; removing an entire portion of the upper preliminary stack structure on the second pad area; forming a first mask defining openings over parts of the first and second pad areas; etching an etch depth corresponding to ones of the plurality of interlayer insulating and sacrificial layers through a remaining part of the preliminary stack structure exposed by the first mask; and repetitively performing a first staircase forming process that includes shrinking sides of the first mask and etching the etch depth through remaining parts of the plurality of interlayer insulating and sacrificial layers exposed by the shrunken first mask.
Public/Granted literature
- US09257444B2 Method of fabricating semiconductor devices having vertical cells Public/Granted day:2016-02-09
Information query
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