发明申请
- 专利标题： Real Time Instruction Trace Processors, Methods, and Systems
- 专利标题（中）： 实时指令跟踪处理器，方法和系统
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申请号： US13730834申请日： 2012-12-29
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公开(公告)号： US20140189314A1公开(公告)日： 2014-07-03
- 发明人: Tsvika Kurts , Ofer Levy , Itamar Kazachinsky , Gabi Malka , Zeev Sperber , Jason W. Brandt
- 申请人： Tsvika Kurts , Ofer Levy , Itamar Kazachinsky , Gabi Malka , Zeev Sperber , Jason W. Brandt
- 主分类号： G06F9/30
- IPC分类号： G06F9/30
摘要：
A method of an aspect includes generating real time instruction trace (RTIT) packets for a first logical processor of a processor. The RTIT packets indicate a flow of software executed by the first logical processor. The RTIT packets are stored in an RTIT queue corresponding to the first logical processor. The RTIT packets are transferred from the RTIT queue to memory predominantly with firmware of the processor. Other methods, apparatus, and systems are also disclosed.
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