发明申请
- 专利标题: FUNCTIONAL MATERIAL SYSTEMS AND PROCESSES FOR PACKAGE-LEVEL INTERCONNECTS
- 专利标题(中): 功能材料系统和包层级互连的过程
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申请号: US13976192申请日: 2012-03-29
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公开(公告)号: US20140225265A1公开(公告)日: 2014-08-14
- 发明人: Rajen S. Sidhu , Ashay A. Dadi , Martha A. Dudek
- 申请人: Rajen S. Sidhu , Ashay A. Dadi , Martha A. Dudek
- 国际申请: PCT/US2012/031289 WO 20120329
- 主分类号: H01L23/532
- IPC分类号: H01L23/532 ; H01L21/768
摘要:
Interconnect packaging technology for direct-chip-attach, package-on-package, or first level and second level interconnect stack-ups with reduced Z-heights relative to ball technology. In embodiments, single or multi-layered interconnect structures are deposited in a manner that permits either or both of the electrical and mechanical properties of specific interconnects within a package to be tailored, for example based on function. Functional package interconnects may vary one of more of at least material layer composition, layer thickness, number of layers, or a number of materials to achieve a particular function, for example based on an application of the component(s) interconnected or an application of the assembly as a whole. In embodiments, parameters of the multi-layered laminated structures are varied dependent on the interconnect location within an area of a substrate, for example with structures having higher ductility at interconnect locations subject to higher stress.