发明申请
US20140254285A1 Temperature-Based Adaptive Erase or Program Parallelism 有权
基于温度的自适应擦除或程序并行性

Temperature-Based Adaptive Erase or Program Parallelism
摘要:
A method includes, in one implementation, performing a memory operation to place memory cells of a memory array to a first logic state using a voltage of a charge pump. A portion of the operation is performed on the memory cells using the voltage of the charge pump. A temperature of the memory array is compared to a threshold. If the temperature is above a reference level, a load on the charge pump is reduced by providing the voltage to only a reduced number of memory cells.
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