发明申请
US20140264516A1 METHODS OF FORMING PATTERNS AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME 有权
形成图案的方法和使用该方法制造半导体器件的方法

  • 专利标题: METHODS OF FORMING PATTERNS AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME
  • 专利标题(中): 形成图案的方法和使用该方法制造半导体器件的方法
  • 申请号: US14210329
    申请日: 2014-03-13
  • 公开(公告)号: US20140264516A1
    公开(公告)日: 2014-09-18
  • 发明人: Bum-Seok SEOKi-Joon KIMKil-Ho LEE
  • 申请人: Bum-Seok SEOKi-Joon KIMKil-Ho LEE
  • 优先权: KR10-2013-0027082 20130314
  • 主分类号: H01L43/02
  • IPC分类号: H01L43/02 H01L43/12
METHODS OF FORMING PATTERNS AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME
摘要:
An insulation layer is formed on a substrate. A first mask is formed on the insulation layer. The first mask includes a plurality of line patterns arranged in a second direction. The plurality of line patterns extend in a first direction substantially perpendicular to the second direction. A second mask is formed on the insulation layer and the first mask. The second mask includes an opening partially exposing the plurality of line patterns. The opening has an uneven boundary at one of a first end portion in the first direction and a second end portion in a third direction substantially opposite to the first direction. The insulation layer is partially removed using the first mask and the second mask as an etching mask, thereby forming a plurality of first trenches and second trenches. The plurality of first trenches and the second trenches are arranged in a staggered pattern.
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