Invention Application
US20140291750A1 MEMORY DEVICE HAVING MULTIPLE DIELECTRIC GATE STACKS WITH FIRST AND SECOND DIELECTRIC LAYERS AND RELATED METHODS
有权
具有第一和第二介质层的多个介电栅极堆叠的存储器件及相关方法
- Patent Title: MEMORY DEVICE HAVING MULTIPLE DIELECTRIC GATE STACKS WITH FIRST AND SECOND DIELECTRIC LAYERS AND RELATED METHODS
- Patent Title (中): 具有第一和第二介质层的多个介电栅极堆叠的存储器件及相关方法
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Application No.: US13852720Application Date: 2013-03-28
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Publication No.: US20140291750A1Publication Date: 2014-10-02
- Inventor: Prasanna KHARE , Stephane Allegret-Maret , Nicolas Loubet , Qing Liu , Hemanth Jagannathan , Lisa Edge , Kangguo Cheng , Bruce Doris
- Applicant: STMICROELECTRONICS, INC. , INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk US TX Coppell
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,STMICROELECTRONICS, INC.
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,STMICROELECTRONICS, INC.
- Current Assignee Address: US NY Armonk US TX Coppell
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/792 ; H01L29/66
Abstract:
A memory device may include a semiconductor substrate, and a memory transistor in the semiconductor substrate. The memory transistor may include source and drain regions in the semiconductor substrate and a channel region therebetween, and a gate stack having a first dielectric layer over the channel region, a second dielectric layer over the first dielectric layer, a first diffusion barrier layer over the second dielectric layer, a first electrically conductive layer over the first diffusion barrier layer, a second diffusion barrier layer over the first electrically conductive layer, and a second electrically conductive layer over the second diffusion barrier layer. The first and second dielectric layers may include different dielectric materials, and the first diffusion barrier layer may be thinner than the second diffusion barrier layer.
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