Invention Application
US20140295655A1 METHOD FOR FORMING THROUGH-SILICON VIA (TSV) WITH DIFFUSED ISOLATION WELL 审中-公开
通过具有扩散隔离层(TSV)形成通过硅的方法

  • Patent Title: METHOD FOR FORMING THROUGH-SILICON VIA (TSV) WITH DIFFUSED ISOLATION WELL
  • Patent Title (中): 通过具有扩散隔离层(TSV)形成通过硅的方法
  • Application No.: US14301133
    Application Date: 2014-06-10
  • Publication No.: US20140295655A1
    Publication Date: 2014-10-02
  • Inventor: Chi-Yeh YU
  • Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
  • Main IPC: H01L21/768
  • IPC: H01L21/768
METHOD FOR FORMING THROUGH-SILICON VIA (TSV) WITH DIFFUSED ISOLATION WELL
Abstract:
A semiconductor device and method for forming the same provide a through silicon via (TSV) surrounded by a dielectric liner. The TSV and dielectric liner are surrounded by a well region formed by thermal diffusion. The well region includes a dopant impurity type opposite the dopant impurity type of the substrate. The well region may be a double-diffused well with an inner portion formed of a first material and with a first concentration and an outer portion formed of a second material with a second concentration. The surrounding well region serves as an isolation well, reducing parasitic capacitance.
Information query
Patent Agency Ranking
0/0