Invention Application
US20140367803A1 FINFET GATE WITH INSULATED VIAS AND METHOD OF MAKING SAME
有权
具有绝缘VIAS的FINFET闸门及其制造方法
- Patent Title: FINFET GATE WITH INSULATED VIAS AND METHOD OF MAKING SAME
- Patent Title (中): 具有绝缘VIAS的FINFET闸门及其制造方法
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Application No.: US13917019Application Date: 2013-06-13
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Publication No.: US20140367803A1Publication Date: 2014-12-18
- Inventor: Hong YU , Wang ZHENG , Huang LIU , Yongsik MOON
- Applicant: Globalfoundries, Inc.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L21/28 ; H01L29/49
Abstract:
An intermediate semiconductor structure of a FinFET device in fabrication includes a substrate, a plurality of fin structures coupled to the substrate and a dummy gate disposed perpendicularly over the fin structures. A portion of the dummy gate is removed between the fin structures to create one or more vias and the one or more vias are filled with a dielectric. The dummy gate is then replaced with a metal gate formed around the dielectric-filled vias.
Public/Granted literature
- US09153693B2 FinFET gate with insulated vias and method of making same Public/Granted day:2015-10-06
Information query
IPC分类:
