A data processing apparatus formed on an integrated circuit comprising: a plurality of processors; power control circuitry configured to control power up and power down of the processors; a read only memory for storing boot up software for booting up each of the processors. The power control circuitry is configured to respond to receipt of a check state request, to control one of the processors that is currently powered down to power up and to access the boot up software. The boot up software accessed in response to the check state request controls the processor to perform a measurement indicative of a current state of the data processing apparatus and to output a value indicative of the measurement.