Invention Application
US20150061014A1 FIN PITCH SCALING AND ACTIVE LAYER ISOLATION 有权
FIN PITCH SCALING和主动层隔离

FIN PITCH SCALING AND ACTIVE LAYER ISOLATION
Abstract:
A first semiconductor structure includes a bulk silicon substrate and one or more original silicon fins coupled to the bulk silicon substrate. A dielectric material is conformally blanketed over the first semiconductor structure and recessed to create a dielectric layer. A first cladding material is deposited adjacent to the original silicon fin, after which the original silicon fin is removed to form a second semiconductor structure having two fins that are electrically isolated from the bulk silicon substrate. A second cladding material is patterned adjacent to the first cladding material to form a third semiconductor structure having four fins that are electrically isolated from the bulk silicon substrate.
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