Invention Application
US20150221346A1 AREA EFFICIENT MULTIPORT BITCELL 审中-公开
区域高效多点比特

AREA EFFICIENT MULTIPORT BITCELL
Abstract:
A multiport bitcell apparatus includes a plurality of word lines for enabling writing and reading operations. The word lines include a first set of word lines extending across the bitcell on a first metal layer. The word lines further include a second set of word lines extending across the bitcell on a second metal layer. The word lines further include a third set of word lines extending across the bitcell on both the first metal layer and the second metal layer. The third set of word lines may include a first word line that extends on a first metal track and a second metal track, and a second word line that extends on the second metal track and a third metal track. The first metal layer may be an M2 layer and the second metal layer may be an M3 layer.
Information query
Patent Agency Ranking
0/0