A cache lock validation apparatus for a cache having sets of cache lines and coupled to a cache controller. The apparatus includes a memory coupled to a processor. The memory includes test case data related to an architecture of the cache. The processor selects a first set of the sets of cache lines and generates a corresponding first group of addresses and an overflow status address. The processor instructs the cache controller to sequentially lock the first group of addresses and the overflow status address. The processor checks a status of an overflow bit in a status register of the cache controller upon locking the overflow status address, and generates a FAIL status signal when the overflow bit is reset.