Invention Application
- Patent Title: Power Transistor Die with Capacitively Coupled Bond Pad
- Patent Title (中): 功率晶体管管芯与电容耦合焊盘
-
Application No.: US14186840Application Date: 2014-02-21
-
Publication No.: US20150243649A1Publication Date: 2015-08-27
- Inventor: Helmut Brech , Matthias Zigldrum , Albert Birner , Richard Wilson , Saurabh Goel
- Applicant: Infineon Technologies AG
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L23/00 ; H01L23/528 ; H01L23/522 ; H01L49/02

Abstract:
A power transistor die includes a transistor formed in a semiconductor body. The transistor has a gate terminal, an output terminal and a third terminal. The gate terminal controls a conduction channel between the output terminal and the third terminal. The power transistor die further includes a structured first metal layer disposed on and insulated from the semiconductor body. The structured first metal layer is connected to the output terminal of the transistor. The power transistor die also includes a first bond pad disposed on and insulated from the semiconductor body. The first bond pad forms an output terminal of the power transistor die and is capacitively coupled to the structured first metal layer so as to form a series capacitance between the output terminal of the transistor and the first bond pad. A power semiconductor package including the power transistor die is also provided.
Information query
IPC分类: