发明申请
US20150287642A1 III-V, SiGe, or Ge Base Lateral Bipolar Transistor and CMOS Hybrid Technology
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III-V，SiGe或Ge基侧向双极晶体管和CMOS混合技术
- 专利标题： III-V, SiGe, or Ge Base Lateral Bipolar Transistor and CMOS Hybrid Technology
- 专利标题（中）： III-V，SiGe或Ge基侧向双极晶体管和CMOS混合技术
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申请号： US14245627申请日： 2014-04-04
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公开(公告)号： US20150287642A1公开(公告)日： 2015-10-08
- 发明人: Josephine B. Chang , Gen P. Lauer , Isaac Lauer , Jeffrey W. Sleight
- 申请人： International Business Machines Corporation
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L21/8249
- IPC分类号： H01L21/8249 ; H01L21/02 ; H01L21/24 ; H01L27/06 ; H01L29/08 ; H01L29/10 ; H01L29/45 ; H01L29/735 ; H01L29/66 ; H01L21/285
摘要：
In one aspect, a method of fabricating a bipolar transistor device on a wafer includes the following steps. A dummy gate is formed on the wafer, wherein the dummy gate is present over a portion of the wafer that serves as a base of the bipolar transistor. The wafer is doped to form emitter and collector regions on both sides of the dummy gate. A dielectric filler layer is deposited onto the wafer surrounding the dummy gate. The dummy gate is removed selective to the dielectric filler layer, thereby exposing the base. The base is recessed. The base is re-grown from an epitaxial material selected from the group consisting of: SiGe, Ge, and a III-V material. Contacts are formed to the base. Techniques for co-fabricating a bipolar transistor and CMOS FET devices are also provided.
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