Invention Application
US20150301760A1 CORRECTION OF BLOCK ERRORS FOR A SYSTEM HAVING NON-VOLATILE MEMORY
审中-公开
对具有非易失性存储器的系统的块错误的校正
- Patent Title: CORRECTION OF BLOCK ERRORS FOR A SYSTEM HAVING NON-VOLATILE MEMORY
- Patent Title (中): 对具有非易失性存储器的系统的块错误的校正
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Application No.: US14754468Application Date: 2015-06-29
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Publication No.: US20150301760A1Publication Date: 2015-10-22
- Inventor: Andrew W. Vogan , Daniel J. Post
- Applicant: Apple Inc.
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F11/10

Abstract:
Systems and methods are disclosed for correction of block errors for a system having non-volatile memory (“NVM”). In particular, the system can store a parity page per page-modulo, where a pre-determined number of pages of a block or a band of the NVM may be allocated as page-modulo XOR (“PMX”) parity pages. This can be a space efficient approach for recovering from single-block data errors such as, for example, single-page uncorrectable error-correcting codes (“uECCs”) and/or errors caused by word line shorts.
Public/Granted literature
- US09361036B2 Correction of block errors for a system having non-volatile memory Public/Granted day:2016-06-07
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