发明申请
- 专利标题: SEMICONDUCTOR TESTING STRUCTURES AND FABRICATION METHOD THEREOF
- 专利标题(中): 半导体测试结构及其制造方法
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申请号: US14567362申请日: 2014-12-11
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公开(公告)号: US20150316583A1公开(公告)日: 2015-11-05
- 发明人: NAN LI , LILUNG LAI , LING ZHU
- 申请人: Semiconductor Manufacturing International (Beijing) Corporation , Semiconductor Manufacturing International (Shanghai) Corporation
- 优先权: CN2014-10185201.3 20140504
- 主分类号: G01Q30/20
- IPC分类号: G01Q30/20 ; G01B21/20 ; B32B38/10 ; C23F1/00 ; B32B37/18
摘要:
A method is provided for fabricating a semiconductor testing structure. The method includes providing a substrate having a to-be-tested device structure formed on a surface of the substrate, a dielectric layer formed on the surface of the substrate and a surface of the to-be-tested structure, and conductive structures and an insulation layer electrically insulating the conductive structures formed on a first surface of the dielectric layer. The method also includes planarizing the conductive structures and the insulation layer to remove the conductive structures and the insulation layer until the first surface of the dielectric layer is exposed; and bonding the first surface of the dielectric layer with a dummy wafer by an adhesive layer. Further, the method includes removing the substrate to expose a second surface relative to the first surface of the dielectric layer of the dielectric layer and a surface of the to-be-tested device structure.