- 专利标题: GATE CONTACT WITH VERTICAL ISOLATION FROM SOURCE-DRAIN
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申请号: US14832530申请日: 2015-08-21
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公开(公告)号: US20150357409A1公开(公告)日: 2015-12-10
- 发明人: David V. Horak , Shom S. Ponoth , Balasubramanian Pranatharthiharan , Ruilong Xie
- 申请人: International Business Machines Corporation , GLOBALFOUNDRIES Inc.
- 主分类号: H01L29/06
- IPC分类号: H01L29/06 ; H01L29/423 ; H01L29/49 ; H01L29/417 ; H01L29/51
摘要:
A method of forming a semiconductor structure includes forming a gate structure having a first conductive material above a semiconductor substrate, gate spacers on opposing sides of the first conductive material, and a first interlevel dielectric (ILD) layer surrounding the gate spacers and the first conductive material. An upper portion of the first conductive material is recessed. The gate spacers are recessed until a height of the gate spacers is less than a height of the gate structure. An isolation liner is deposited above the gate spacers and the first conductive material. A portion of the isolation liner is removed so that a top surface of the first conductive material is exposed. A second conductive material is deposited in a contact hole created above the first conductive material and the gate spacers to form a gate contact.
公开/授权文献
- US09349598B2 Gate contact with vertical isolation from source-drain 公开/授权日:2016-05-24
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