A transistor SEL is formed by using a compound semiconductor layer (channel layer CNL). The channel layer CNL is formed over a buffer layer BUF. In a first direction where a drain electrode DRE, a gate electrode GE, and a source electrode SOE of the transistor SEL are arranged, at least a portion of the buried electrode BE is situated on the side opposing the source electrode SOE with reference to the gate electrode GE. The buried electrode BE is connected to the source electrode SOE of the transistor SEL. The top end of the buried electrode BE intrudes into the buffer layer BUF.