Invention Application
US20150364603A1 FINFET AND NANOWIRE SEMICONDUCTOR DEVICES WITH SUSPENDED CHANNEL REGIONS AND GATE STRUCTURES SURROUNDING THE SUSPENDED CHANNEL REGIONS
有权
FINFET和NANOWIRE半导体器件与悬挂的通道区域和门结构围绕着悬挂的通道区域
- Patent Title: FINFET AND NANOWIRE SEMICONDUCTOR DEVICES WITH SUSPENDED CHANNEL REGIONS AND GATE STRUCTURES SURROUNDING THE SUSPENDED CHANNEL REGIONS
- Patent Title (中): FINFET和NANOWIRE半导体器件与悬挂的通道区域和门结构围绕着悬挂的通道区域
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Application No.: US14305543Application Date: 2014-06-16
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Publication No.: US20150364603A1Publication Date: 2015-12-17
- Inventor: Kangguo Cheng , Michael P. Chudzik , Eric C. Harley , Judson R. Holt , Yue Ke , Rishikesh Krishnan , Kern Rim , Henry K. Utomo
- Applicant: International Business Machines Corporation
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/306 ; H01L29/06 ; H01L29/161 ; H01L29/165 ; H01L29/10 ; H01L29/66 ; H01L21/02
Abstract:
A semiconductor device including at least one suspended channel structure of a silicon including material, and a gate structure present on the suspended channel structure. At least one gate dielectric layer is present surrounding the suspended channel structure, and at least one gate conductor is present on the at least one gate dielectric layer. Source and drain structures may be composed of a silicon and germanium including material. The source and drain structures are in contact with the source and drain region ends of the suspended channel structure through a silicon cladding layer.
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