Invention Application
- Patent Title: INTEGRATED CIRCUIT WITH ON-DIE DECOUPLING CAPACITORS
- Patent Title (中): 集成电路与电路解耦电容器
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Application No.: US14467039Application Date: 2014-08-24
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Publication No.: US20160056099A1Publication Date: 2016-02-25
- Inventor: Shailesh Kumar , Vikas Garg , Sumit Varshney , Chetan Verma
- Applicant: Shailesh Kumar , Vikas Garg , Sumit Varshney , Chetan Verma
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L21/50
Abstract:
A semiconductor device has an on-die decoupling capacitor that is shared between alternative high-speed interfaces. A capacitance pad is connected to the decoupling capacitor and internal connection pads are connected respectively to the alternative interfaces. Internal connection bond wires connect the decoupling capacitor to the selected interface through the capacitance pad and the internal connection pads in the same process as connecting the die to external electrical contacts of the device.
Public/Granted literature
- US09418873B2 Integrated circuit with on-die decoupling capacitors Public/Granted day:2016-08-16
Information query
IPC分类:
