Invention Application
- Patent Title: MULTILAYER WIRING BOARD
- Patent Title (中): 多层接线板
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Application No.: US14933268Application Date: 2015-11-05
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Publication No.: US20160057862A1Publication Date: 2016-02-25
- Inventor: Hiromichi KITAJIMA
- Applicant: Murata Manufacturing Co., Ltd.
- Priority: JP2013-098465 20130508
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H04M1/02 ; H01L23/498 ; H01L23/66 ; H05K1/02 ; H05K1/09

Abstract:
A method reduces an area of a mounting electrode provided on a first surface of a multilayer body and connected to a specific component is reduced and decreases a pitch between mounting electrodes. A plating film is formed on the mounting electrodes with the reduced area. The mounting electrodes for connection to specific components are defined by first end surfaces of first via conductors, and hence, the areas of the mounting electrodes are significantly reduced, and the pitch between the mounting electrodes is significantly decreased. Also, the mounting electrodes defined by the first end surfaces of the first via conductors are connected to plane electrodes at end surfaces of second via conductors exposed from a surface of the multilayer body with internal wiring electrodes interposed therebetween. Thus, a plating film is able to be reliably provided on the mounting electrodes.
Public/Granted literature
- US09844138B2 Multilayer wiring board Public/Granted day:2017-12-12
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