Invention Application
US20160072521A1 DELTA-SIGMA MODULATOR WITH REDUCED INTEGRATOR REQUIREMENTS
有权
具减少积分器要求的DELTA-SIGMA调制器
- Patent Title: DELTA-SIGMA MODULATOR WITH REDUCED INTEGRATOR REQUIREMENTS
- Patent Title (中): 具减少积分器要求的DELTA-SIGMA调制器
-
Application No.: US14845899Application Date: 2015-09-04
-
Publication No.: US20160072521A1Publication Date: 2016-03-10
- Inventor: John L. Melanson , Stephen T. Hodapp
- Applicant: Cirrus Logic, Inc.
- Main IPC: H03M3/00
- IPC: H03M3/00

Abstract:
Requirements placed on the first integrator of a filter in a continuous-time delta-feedback modulator may be reduced by using circuitry to reduce the speed of a signal provided to the first integrator of the modulator. The reduction in speed applied to the signal received at the first integrator may then be compensated with circuitry elsewhere in the modulator, such that the net effect of the slow down and speed up of signals does not affect the output of the modulator. The sigma-delta modulator may be implemented in converters, such as an analog-to-digital converter (ADC).
Public/Granted literature
- US09379732B2 Delta-sigma modulator with reduced integrator requirements Public/Granted day:2016-06-28
Information query