Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE HAVING CASCADED CHIP STACK
- Patent Title (中): 具有嵌入式芯片堆叠的半导体封装
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Application No.: US14732660Application Date: 2015-06-05
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Publication No.: US20160086921A1Publication Date: 2016-03-24
- Inventor: Yun-Rae CHO
- Applicant: Samsung Electronics Co., Ltd.
- Priority: KR10-2014-0125233 20140919
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/498 ; H01L23/00

Abstract:
A semiconductor package that includes a package substrate, a lower semiconductor chip mounted on the package substrate, and an upper semiconductor chip stacked on the lower semiconductor chip in a cascade shape is provided. An active surface of the lower semiconductor chip is facing an active surface of the upper semiconductor chip.
Public/Granted literature
- US09553074B2 Semiconductor package having cascaded chip stack Public/Granted day:2017-01-24
Information query
IPC分类: