Invention Application
- Patent Title: LIL ENHANCED ESD-PNP IN A BCD
- Patent Title (中): LCD在BCD中增强ESD-PNP
-
Application No.: US14495468Application Date: 2014-09-24
-
Publication No.: US20160086934A1Publication Date: 2016-03-24
- Inventor: Albert Jan Huitsing , Jan Claes
- Applicant: NXP B.V.
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L21/8222 ; H01L23/367 ; H01L27/12 ; H01L27/082 ; H01L23/535

Abstract:
Disclosed is a PNP ESD integrated circuit, including a substrate, an active region formed within the substrate, the active region including at least one base region of a second conductivity type, a plurality of collector regions of a first conductivity type formed within the active region, a plurality of emitter regions of the first conductivity type formed within the active region, and a local interconnect layer (LIL) contacting the plurality of emitter regions and the plurality of collector regions, the LIL including cooling fin contacts formed on the collector regions to enhance the current handling capacity of the collector regions.
Public/Granted literature
- US09653447B2 Local interconnect layer enhanced ESD in a bipolar-CMOS-DMOS Public/Granted day:2017-05-16
Information query
IPC分类: