Invention Application
US20160086974A1 METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURES INCLUDING TRANSISTOR CHANNELS HAVING DIFFERENT STRAIN STATES, AND RELATED SEMICONDUCTOR STRUCTURES
审中-公开
制备半导体结构的方法,包括具有不同应变状态的晶体管通道和相关半导体结构
- Patent Title: METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURES INCLUDING TRANSISTOR CHANNELS HAVING DIFFERENT STRAIN STATES, AND RELATED SEMICONDUCTOR STRUCTURES
- Patent Title (中): 制备半导体结构的方法,包括具有不同应变状态的晶体管通道和相关半导体结构
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Application No.: US14830332Application Date: 2015-08-19
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Publication No.: US20160086974A1Publication Date: 2016-03-24
- Inventor: Mariam Sadaka , Bich-Yen Nguyen , Ionut Radu
- Applicant: Soitec
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L29/78 ; H01L27/092 ; H01L29/16 ; H01L29/161

Abstract:
Methods of fabricating a semiconductor structure include implanting ion into a second region of a strained semiconductor layer on a multi-layer substrate to amorphize a portion of crystalline semiconductor material in the second region of the strained semiconductor layer without amorphizing a first region of the strained semiconductor layer. The amorphous region is recrystallized, and elements are diffused within the semiconductor layer to enrich a concentration of the diffused elements in a portion of the second region of the strained semiconductor layer and alter a strain state therein relative to a strain state of the first region of the strained semiconductor layer. A first plurality of transistor channel structures are formed that each comprise a portion of the first region of the semiconductor layer, and a second plurality of transistor channel structures are formed that each comprise a portion of the second region of the semiconductor layer.
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