A display panel includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer. A thin film transistor is disposed on a substrate and has a drain. A first insulating layer is disposed on the drain and has a first via above the drain. A planarization layer is disposed on the first insulating layer and has a second via above the drain. The first via and the second via are partially overlapped to form an overlap portion. A second insulating layer is disposed on the planarization layer. A pixel electrode layer is disposed on the second insulating layer and in the overlap portion to connect to the drain. The opposite substrate is disposed opposite to the thin film transistor substrate. The liquid crystal layer is disposed between the thin film transistor substrate and the opposite substrate.