Invention Application
US20160100191A1 PIPELINED INTRA-PREDICTION HARDWARE ARCHITECTURE FOR VIDEO CODING
审中-公开
用于视频编码的管道预测硬件架构
- Patent Title: PIPELINED INTRA-PREDICTION HARDWARE ARCHITECTURE FOR VIDEO CODING
- Patent Title (中): 用于视频编码的管道预测硬件架构
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Application No.: US14503669Application Date: 2014-10-01
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Publication No.: US20160100191A1Publication Date: 2016-04-07
- Inventor: Ashish Mishra , Arindam Mohanta
- Applicant: QUALCOMM Incorporated
- Main IPC: H04N19/61
- IPC: H04N19/61 ; H04N19/593 ; H04N19/176 ; H04N19/146 ; H04N19/52 ; H04N19/119

Abstract:
As the quality and quantity of shared video content increases, video encoding standards and techniques are being developed and improved to reduce bandwidth consumption over telecommunication and other networks. One technique to reduce bandwidth consumption is intra-prediction, which exploits spatial redundancies within video frames. Each video frame may be segmented into blocks, and intra-prediction may be applied to the blocks. However, intra-prediction of some blocks may rely upon the completion (e.g., reconstruction) of other blocks, which can make parallel processing challenging. Provided are exemplary techniques for improving the efficiency and throughput associated with the intra-prediction of multiple blocks.
Public/Granted literature
- US10091530B2 Pipelined intra-prediction hardware architecture for video coding Public/Granted day:2018-10-02
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