Invention Application
US20160111421A1 MULTIPLE CPP FOR INCREASED SOURCE/DRAIN AREA FOR FETS INCLUDING IN A CRITICAL SPEED PATH
审中-公开
多个CPP用于增加源极/排水区，包括在关键速度路径
- Patent Title: MULTIPLE CPP FOR INCREASED SOURCE/DRAIN AREA FOR FETS INCLUDING IN A CRITICAL SPEED PATH
- Patent Title (中): 多个CPP用于增加源极/排水区，包括在关键速度路径
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Application No.: US14828509Application Date: 2015-08-17
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Publication No.: US20160111421A1Publication Date: 2016-04-21
- Inventor: Mark S. RODDER , Rwik SENGUPTA , Borna OBRADOVIC
- Applicant: Mark S. RODDER , Rwik SENGUPTA , Borna OBRADOVIC
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/78 ; H01L29/66 ; H01L29/10
Abstract:
An integrated circuit comprises at least one block comprising a first cell and a second cell. The first cell comprises a first FET formed with a first contacted poly pitch (CPP), and the second cell comprises a second FET formed with a second CPP. The first CPP is greater than the second CPP. The first FET is part of a critical-speed path, and the second FET is part of a noncritical-speed path, in which the critical-speed path operates at a faster speed than the noncritical-speed path. The first FET and the second FET each comprise a planar FET, a finFET, a gate-all-around FET or a nanosheet FET. A method for forming the integrated circuit is also disclosed.
Information query
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