Invention Application
- Patent Title: Memory Bus Error Signal
- Patent Title (中): 内存总线错误信号
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Application No.: US14889973Application Date: 2013-06-27
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Publication No.: US20160124797A1Publication Date: 2016-05-05
- Inventor: Melvin K. Benedict
- Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
- International Application: PCT/US2013/048120 WO 20130627
- Main IPC: G06F11/07
- IPC: G06F11/07
Abstract:
A technique includes receiving, by a device a command, wherein a response to the command is expected from the device within a predetermined response time. The device may selectively generate an error signal to allow time for the device to complete processing the command.
Information query
