Invention Application
US20160126310A1 S/D CONNECTION TO INDIVIDUAL CHANNEL LAYERS IN A NANOSHEET FET
有权
与NANOSHEET FET中的单个通道层的S / D连接
- Patent Title: S/D CONNECTION TO INDIVIDUAL CHANNEL LAYERS IN A NANOSHEET FET
- Patent Title (中): 与NANOSHEET FET中的单个通道层的S / D连接
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Application No.: US14919634Application Date: 2015-10-21
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Publication No.: US20160126310A1Publication Date: 2016-05-05
- Inventor: Mark RODDER , Joon HONG , Jorge KITTL , Borna OBRADOVIC
- Applicant: Samsung Electronics Co., Ltd.
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/78 ; H01L21/02 ; H01L29/49 ; H01L21/283 ; H01L29/66 ; H01L29/417

Abstract:
A field effect transistor (FET) and a method to form the FET are disclosed. The FET comprises a channel region comprising a nanosheet layer/sacrificial layer stack. The stack comprises at least one nanosheet layer/sacrificial layer pair. Each nanosheet layer/sacrificial layer pair comprises an end surface. A conductive material layer is formed on the end surface of the pairs, and a source/drain contact is formed on the conductive material layer. In one embodiment, the sacrificial layer of at least one pair further may comprise a low-k dielectric material proximate to the end surface of the pair. A surface of the low-k dielectric material proximate to the end surface of the pair is in substantial alignment with the end surface of the nanosheet layer. Alternatively, the surface of the low-k dielectric material proximate to the end surface of the pair is recessed with respect to the end surface of the nanosheet layer.
Public/Granted literature
- US09653287B2 S/D connection to individual channel layers in a nanosheet FET Public/Granted day:2017-05-16
Information query
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