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    LOW-K DIELECTRIC PORE SEALANT AND METAL-DIFFUSION BARRIER FORMED BY DOPING AND METHOD FOR FORMING THE SAME
    1.
    发明申请
    LOW-K DIELECTRIC PORE SEALANT AND METAL-DIFFUSION BARRIER FORMED BY DOPING AND METHOD FOR FORMING THE SAME 审中-公开
    低K型电介质密封剂和通过掺杂形成的金属扩散阻挡层及其形成方法

    公开(公告)号：US20160148870A1

    公开(公告)日：2016-05-26

    申请号：US14931845

    申请日：2015-11-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ganesh HEGDE ,  Mark RODDER ,  Jorge KITTL ,  Chris BOWEN

    IPC: H01L23/528 ,  H01L23/532 ,  H01L21/225 ,  H01L21/768

    CPC classification number: H01L23/53238 ,  H01L21/225 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76855 ,  H01L23/53223 ,  H01L23/53252 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A diffusion barrier and a method to form the diffusion bather are disclosed. A trench structure is formed in an Inter Layer Dielectric (ILD). The ILD comprises a dielectric matrix having a first density. A dopant material layer is formed on the trench structure in which the dopant material layer comprises atoms of at least one of a rare-earth element. The ILD and the trench structure are annealed to form a dielectric matrix comprising a second density in one or more regions of the ILD on which the dopant material layer was formed that is greater than the first density. After annealing, the dielectric matrix comprising the second density includes increased bond lengths of oxygen-silicon bonds and/or oxygen-semiconductor bonds, increased bond angles of oxygen-silicon bonds and/or oxygen-semiconductor material bonds, and pores in the dielectric matrix are sealed compared to the dielectric matrix comprising the first density.

    Abstract translation: 公开了扩散阻挡层和形成扩散浴的方法。 在层间电介质（ILD）中形成沟槽结构。 ILD包括具有第一密度的介电矩阵。 掺杂剂材料层形成在沟槽结构中，其中掺杂剂材料层包含稀土元素中的至少一种的原子。 对ILD和沟槽结构进行退火以在ILD的一个或多个区域中形成包含第二密度的介质矩阵，其上形成有大于第一密度的掺杂剂材料层。 在退火之后，包括第二密度的介电矩阵包括增加的氧 - 硅键和/或氧 - 半键键的键长度，增加的氧 - 硅键和/或氧 - 半导体材料键的键角以及介电矩阵中的孔 与包含第一密度的介电矩阵相比是密封的。

    S/D CONNECTION TO INDIVIDUAL CHANNEL LAYERS IN A NANOSHEET FET
    2.
    发明申请
    S/D CONNECTION TO INDIVIDUAL CHANNEL LAYERS IN A NANOSHEET FET 有权
    与NANOSHEET FET中的单个通道层的S / D连接

    公开(公告)号：US20160126310A1

    公开(公告)日：2016-05-05

    申请号：US14919634

    申请日：2015-10-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Mark RODDER ,  Joon HONG ,  Jorge KITTL ,  Borna OBRADOVIC

    IPC: H01L29/06 ,  H01L29/78 ,  H01L21/02 ,  H01L29/49 ,  H01L21/283 ,  H01L29/66 ,  H01L29/417

    CPC classification number: H01L21/02603 ,  H01L21/28518 ,  H01L21/28531 ,  H01L29/0665 ,  H01L29/41733 ,  H01L29/41758 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/78696

    Abstract: A field effect transistor (FET) and a method to form the FET are disclosed. The FET comprises a channel region comprising a nanosheet layer/sacrificial layer stack. The stack comprises at least one nanosheet layer/sacrificial layer pair. Each nanosheet layer/sacrificial layer pair comprises an end surface. A conductive material layer is formed on the end surface of the pairs, and a source/drain contact is formed on the conductive material layer. In one embodiment, the sacrificial layer of at least one pair further may comprise a low-k dielectric material proximate to the end surface of the pair. A surface of the low-k dielectric material proximate to the end surface of the pair is in substantial alignment with the end surface of the nanosheet layer. Alternatively, the surface of the low-k dielectric material proximate to the end surface of the pair is recessed with respect to the end surface of the nanosheet layer.

    Abstract translation: 公开了场效应晶体管（FET）和形成FET的方法。 FET包括包括纳米片层/牺牲层堆叠的沟道区。 堆叠包括至少一个纳米片层/牺牲层对。 每个纳米片层/牺牲层对包括端面。 在该对的端面上形成导电材料层，并且在导电材料层上形成源极/漏极接触。 在一个实施例中，至少一对的牺牲层还可以包括靠近该对的端表面的低k电介质材料。 靠近该对的端面的低k电介质材料的表面与纳米片层的端面基本对准。 或者，靠近该对的端表面的低k电介质材料的表面相对于纳米片层的端表面凹陷。

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