发明申请
US20160173111A1 MODIFIED DELTA-SIGMA MODULATOR FOR PHASE COHERENT FREQUENCY SYNTHESIS APPLICATIONS
有权
用于相位频率合成应用的改进型DELTA-SIGMA调制器
- 专利标题: MODIFIED DELTA-SIGMA MODULATOR FOR PHASE COHERENT FREQUENCY SYNTHESIS APPLICATIONS
- 专利标题(中): 用于相位频率合成应用的改进型DELTA-SIGMA调制器
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申请号: US14968180申请日: 2015-12-14
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公开(公告)号: US20160173111A1公开(公告)日: 2016-06-16
- 发明人: Joseph D. Cali , Steven E. Turner
- 申请人: BAE SYSTEMS Information and Electronic Systems Integration Inc.
- 申请人地址: US NH Nashua
- 专利权人: BAE SYSTEMS Information and Electronic Systems Integration Inc.
- 当前专利权人: BAE SYSTEMS Information and Electronic Systems Integration Inc.
- 当前专利权人地址: US NH Nashua
- 主分类号: H03L7/18
- IPC分类号: H03L7/18 ; H03M3/00
摘要:
A phase coherent fractional-N phase-locked loop synthesizer for maintaining phase coherence of a synthesized frequency includes a phase coherent delta-sigma modulator (DSM) having a plurality of feed-forward accumulator stages. The DSM is operatively coupled to a reference clock configured to generate a cyclical reference signal. The DSM configured to count a number of cycles of the reference signal, to cause, at each cycle of the reference signal, each of the stages of the DSM to accumulate a sum of a previous stage of the DSM, and to multiply each sum by a fractional divide word to produce a multiplier output, thereby causing the DSM to output a sequence of signals that tracks with the reference clock.
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