发明申请
- 专利标题: WAFER STRUCTURE AND METHOD FOR WAFER DICING
- 专利标题(中): WAFER结构和WAFER DICING方法
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申请号: US14577141申请日: 2014-12-19
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公开(公告)号: US20160181213A1公开(公告)日: 2016-06-23
- 发明人: Yueh-Chuan LEE , Chia-Chan CHEN
- 申请人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L21/78 ; H01L21/306 ; H01L23/58
摘要:
The semiconductor die includes a base body, protruding portions and bonding pads. The base body has sidewalls. The protruding portions are laterally protruding from the sidewalls respectively. The bonding pads are disposed on the protruding portions respectively. The wafer dicing method includes following operations. Chips are formed on a semiconductor wafer. Bonding pads are formed on a border line between every two of the adjacent chips. A scribe line is formed and disposed along the bonding pads. A photolithographic pattern is formed on a top surface of the semiconductor wafer to expose the scribe line. The scribe line is etched to a depth in the semiconductor wafer substantially below the top surface layer to form an etched pattern. A back surface of the semiconductor wafer is thinned until the etched pattern in the wafer substrate is exposed.
公开/授权文献
- US09748187B2 Wafer structure and method for wafer dicing 公开/授权日:2017-08-29
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