Invention Application
- Patent Title: Method for Testing Embedded Systems
- Patent Title (中): 嵌入式系统测试方法
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Application No.: US14592585Application Date: 2015-01-08
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Publication No.: US20160202310A1Publication Date: 2016-07-14
- Inventor: Andrzej Wlodzimierz Nawrocki
- Applicant: Andrzej Wlodzimierz Nawrocki
- Applicant Address: CA Mississauga
- Assignee: HONEYWELL ASCA INC.
- Current Assignee: HONEYWELL ASCA INC.
- Current Assignee Address: CA Mississauga
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3187

Abstract:
Functional diagnostic testing of an electronic circuit board assembly with one or more embedded channels to be tested includes steps of: (a) connecting a channel under test; (b) imposing a known digital or analog voltage, as appropriate for a channel under test, that is generated by a digital or analog output of the electronic circuit board assembly; and (c) comparing data read by the channel under test with the stored value of the imposed voltage and required tolerance to determine whether the channel under test is within specifications. Diagnostic test implemented by digital logic and software residing onboard the electronic circuit board assembly. Execution of software or firmware code segment controls the diagnostic test sequence. Signal switching is facilitated by digital and analog multiplexers.
Public/Granted literature
- US09494651B2 Method for testing embedded systems Public/Granted day:2016-11-15
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