Invention Application
- Patent Title: LOW-OVERHEAD DEBUG ARCHITECTURE USING A SPECULATIVE, CONCURRENT & DISTRIBUTED DATA CAPTURE AND PROPAGATION SCHEME
- Patent Title (中): 使用分布式,并流和分布式数据采集和传播方案的低端调试架构
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Application No.: US14714283Application Date: 2015-05-16
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Publication No.: US20160202320A1Publication Date: 2016-07-14
- Inventor: Rohit NATARAJAN
- Applicant: Samsung Electronics Co., Ltd.
- Main IPC: G01R31/317
- IPC: G01R31/317 ; G01R31/3177

Abstract:
A system and corresponding method captures speculative and concurrent trace-data and trace-clock information from core processing units of a System on a Chip (SOC). An interface receives trace data from at least one core processing unit, and a storage array stores the trace data in two different modes of operation. In the first mode, which occurs prior to a predetermined operating state of the SOC, the storage array operates in a circular buffer mode in which the newest trace data overwrites the oldest trace data when the storage array becomes full In the second mode, which occurs after the predetermined operating state of the SOC, the storage array operates in a FIFO mode in which the newest trace data is written into the storage array and the oldest trace data contained in the storage array is output to a debug processing core unit of the SOC.
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