Invention Application
US20160203848A1 MEMORY SIGNAL BUFFERS AND MODULES SUPPORTING VARIABLE ACCESS GRANULARITY
有权
内存信号缓冲器和模块支持可变访问格式
- Patent Title: MEMORY SIGNAL BUFFERS AND MODULES SUPPORTING VARIABLE ACCESS GRANULARITY
- Patent Title (中): 内存信号缓冲器和模块支持可变访问格式
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Application No.: US15000394Application Date: 2016-01-19
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Publication No.: US20160203848A1Publication Date: 2016-07-14
- Inventor: Ian Shaeffer
- Applicant: Rambus Inc.
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G06F12/10

Abstract:
Described are memory modules that include a configurable signal buffer that manages communication between memory devices and a memory controller. The buffer can be configured to support threading to reduce access granularity, the frequency of row-activation, or both. The buffer can translate controller commands to access information of a specified granularity into subcommands seeking to access information of reduced granularity. The reduced-granularity information can then be combined, as by concatenation, and conveyed to the memory controller as information of the specified granularity.
Public/Granted literature
- US09666250B2 Memory signal buffers and modules supporting variable access granularity Public/Granted day:2017-05-30
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